1. Field of the Invention
This invention is related to the field of integrated circuits and, more particularly, to detection of power on reset in an integrated circuit.
2. Description of the Related Art
Integrated circuits continue to increase in complexity and the number of high level component functions that are included in the integrated circuit also continues to increase. The system on a chip (SOC) is an example of the high level of integration, including one or more processors and various peripheral components, memory controllers, peripheral interface controllers, etc. on a single integrated circuit “chip.” To ensure that the integrated circuits have been manufactured correctly, and to support debugging of hardware and software (which is complicated by the high level of integration), the integrated circuits typically support test modes in addition to the normal functional operation mode. The test modes may permit state to be scanned into and out of the integrated circuit.
The highly integrated circuits, such as SOCs, may be used in various devices that carry a user's personal data. For example, the integrated circuits may be used in smart phones, personal digital assistants, and other computing devices that a user may incorporate into his/her daily life and thus may carry significant amounts of personal data such as account numbers, passwords, and other personally-identifiable information. Similarly, such devices are increasingly being expected to maintain the digital rights of intellectual property owners (e.g. owners of audio and video data that a user is permitted to enjoy but is not permitted to copy or redistribute). Accordingly, the integrated circuits need to be secure for such data. Integrated circuits that can switch between test mode and normal functional mode may have potential insecurity (or may have a so-called “security hole”) if data from the functional mode is accessible in test mode or vice-versa.